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rev.4.5 _00 battery protection ic for 1-cell pack S-8211D series seiko instruments inc. 1 the S-8211D series are protection ics for single-cell lithium-ion / lithium-polymer rechargeable batteries and include high- accuracy voltage detectors and delay circuits. these ics are suitable for protecting single-cell rechargeable lithium-ion / lithium-polymer battery packs from overcharge, overdischarge, and overcurrent. ? features (1) high-accuracy voltage detection circuit ? overcharge detection voltage 3.9 to 4.4 v (5 mv steps) accuracy 25 mv ( + 25 c) accuracy 30 mv ( ? 5 to + 55 c) ? overcharge release voltage 3.8 to 4.4 v *1 accuracy 50 mv ? overdischarge detection voltage 2.0 to 3.0 v (10 mv steps) accuracy 50 mv ? overdischarge release voltage 2.0 to 3.4 v *2 accuracy 100 mv ? discharge overcurrent detection voltage 0.05 to 0.30 v (10 mv steps) accuracy 15 mv ? load short-circuiting detection voltage 0.5 v (fixed) accuracy 200 mv (2) detection delay times are generated by an intern al circuit (external capacitors are unnecessary). accuracy 20% (3) high-withstanding-voltage device is used for charger connection pins (vm pin and co pin : absolute maximum rating = 28 v) (4) 0 v battery charge function available / unavailable are selectable. (5) shutdown function yes / no are selectable. (6) wide operating temperature range ? 40 to + 85 c (7) low current consumption ? operation mode 3.0 a typ., 5.5 a max. ( + 25 c) ? power-down mode 0.2 a max. ( + 25 c) (8) small package: sot-23-5, snt-6a (9) lead-free product *1. overcharge release voltage = overcharge detection voltage ? overcharge hysteresis voltage (overcharge hysteresis voltage can be selected as 0 v or from a range of 0.1 to 0.4 v in 50 mv steps.) *2. overdischarge release voltage = overdischarge detection voltage + overdischarge hysteresis voltage (overdischarge hysteresis voltage can be selected as 0 v or from a range of 0.1 to 0.7 v in 100 mv steps.) ? applications ? lithium-ion rechargeable battery packs ? lithium-polymer rechargeable battery packs ? packages drawing code package name package tape reel land sot-23-5 mp005-a mp005-a mp005-a ? snt-6a pg006-a pg006-a pg006-a pg006-a
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 2 ? block diagram ? + ? + vm vss vdd co do ? + ? + r vmd r vms load short-circuiting detection comparator discharge overcurrent detection comparator charger detection circuit 0 v battery charge circuit or 0 v battery charge inhibition circuit divider control circuit output control circuit oscillator control circuit overdischarge detection comparator overcharge detection comparator remark all diodes shown in figure are parasitic diodes. figure 1
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 3 ? product name structure 1. product name S-8211D xx - xxxx g package name (abbreviation) and ic packing specifications *1 m5t1 : sot-23-5, tape i6t1 : snt-6a, tape serial code *2 sequentially set from aa to zz *1. refer to the taping specifications. *2. refer to the ? 2. product name list ?.
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 4 2 product name list (1) sot-23-5 table 1 product name / item overcharge detection voltage v cu overcharge release voltage v cl over-discharge detection voltage v dl over-discharge release voltage v du discharge overcurrent detection voltage v diov 0 v battery charge function delay time combination *1 shutdown function S-8211Dab-m5t1g 4.250 v 4.050 v 2.60 v 2.90 v 0.12 v unavailable (1) no S-8211Dae-m5t1g 4.280 v 4.180 v 2.50 v 2.70 v 0.19 v unavailable (1) yes S-8211Dah-m5t1g 4.275 v 4.175 v 2.30 v 2.40 v 0.10 v available (1) yes S-8211Dai-m5t1g 4.325 v 4.075 v 2.50 v 2.90 v 0.15 v unavailable (1) yes S-8211Daj-m5t1g 4.280 v 4.080 v 3.00 v 3.00 v 0.08 v available (1) yes S-8211Dak-m5t1g 4.280 v 4.080 v 2.30 v 2.30 v 0.13 v unavailable (1) yes S-8211Dal-m5t1g 4.280 v 4.080 v 2.80 v 2.80 v 0.10 v available (1) yes S-8211Dam-m5t1g 4.275 v 4.075 v 2.50 v 2.90 v 0.15 v unavailable (1) yes *1. refer to the table 3 about the details of the dela y time combinations (1). remark please contact our sales office for the products wi th detection voltage value other than those specified above. (2) snt-6a table 2 product name / item overcharge detection voltage v cu overcharge release voltage v cl over-discharge detection voltage v dl over-discharge release voltage v du discharge overcurrent detection voltage v diov 0 v battery charge function delay time combination *1 shutdown function S-8211Dab-i6t1g 4.250 v 4.050 v 2.60 v 2.90 v 0.12 v unavailable (1) no S-8211Dae-i6t1g 4.280 v 4.180 v 2.50 v 2.70 v 0.19 v unavailable (1) yes S-8211Daf-i6t1g 4.250 v 4.050 v 2.40 v 2.90 v 0.10 v available (2) no S-8211Dag-i6t1g 4.280 v 4.080 v 2.30 v 2.30 v 0.08 v available (1) no *1. refer to the table 3 about the details of the delay time combinations (1) and (2). remark please contact our sales office for the products wi th detection voltage value other than those specified above.
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 5 table 3 delay time combination overcharge detection delay time t cu overdischarge detection delay time t dl discharge overcurrent detection delay time t diov load short-circuiting detection delay time t short (1) 1.2 s 150 ms 9 ms 300 s (2) 1.2 s 75 ms 9 ms 300 s remark the delay times can be changed within the range listed table 4 . for details, please contact our sales office. table 4 delay time symbol selection range remark overcharge detection delay time t cu 143 ms 573 ms 1.2 s select a value from the left. overdischarge detection delay time t dl 38 ms 150 ms 300 ms select a value from the left. discharge overcurrent detection delay time t diov 4.5 ms 9 ms 18 ms select a value from the left. load short-circuiting detection delay time t short ? 300 s 560 s select a value from the left. remark the value surrounded by bold lines is the delay time of the standard products.
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 6 ? pin configurations table 5 pin no. symbol description 1 vm voltage detection between vm pin and vss pin (overcurrent / charger detection pin) 2 vdd connection for positive power supply input 3 vss connection for negative power supply input 4 do connection of discharge control fet gate (cmos output) 5 co connection of charge control fet gate (cmos output) sot-23-5 top view 5 4 3 2 1 figure 2 table 6 pin no. symbol description 1 nc *1 no connection 2 co connection of charge control fet gate (cmos output) 3 do connection of discharge control fet gate (cmos output) snt-6a to p view 1 2 3 4 6 5 4 vss connection for negative power supply input figure 3 5 vdd connection for positive power supply input 6 vm voltage detection between vm pin and vss pin (overcurrent / charger detection pin) *1. the nc pin is electrically open. the nc pin can be con nected to vdd or vss.
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 7 ? absolute maximum ratings table 7 (ta = 25 c unless otherwise specified) item symbol applied pin absolute maximum ratings unit input voltage between vdd pin and vss pin v ds vdd v ss ? 0.3 to v ss + 12 v vm pin input voltage v vm vm v dd ? 28 to v dd + 0.3 v do pin output voltage v do do v ss ? 0.3 to v dd + 0.3 v co pin output voltage v co co v vm ? 0.3 to v dd + 0.3 v ? 250 (when not mounted on board) mw sot-23-5 ? 600 *1 mw power dissipation snt-6a p d ? 400 *1 mw operating ambient temperature t opr ? ? 40 to + 85 c storage temperature t stg ? ? 55 to + 125 c *1. when mounted on board [mounted board] (1) board size: 114.3 mm 76.2 mm t1.6 mm (2) board name: jedec standard51-7 caution the absolute maximum ratings are rated values exceeding which the product could suffer physical damage. these values must therefore not be exceeded under any conditions. 0 50 100 150 700 400 0 power dissi p ation ( p d ) [ mw ] ambient tem p erature ( ta ) [ c ] 200 600 500 300 100 snt-6a sot-23-5 figure 4 power dissipation of package (when mounted on board)
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 8 ? electrical characteristics 1. except detection delay time (25 c) table 8 (ta = 25 c unless otherwise specified) item symbol condition min. typ. max. unit test condi- tion test circuit detection voltage overcharge detection voltage v cu 3.90 to 4.40 v, adjustable v cu ? 0.025 v cu v cu + 0.025 v 1 1 3.90 to 4.40 v, adjustable, ta = ? 5 to + 55 c *1 v cu ? 0.03 v cu v cu + 0.03 v 1 1 v cl v cu v cl ? 0.05 v cl v cl + 0.05 v 1 1 overcharge release voltage v cl 3.80 to 4.40 v, adjustable v cl = v cu v cl ? 0.05 v cl v cl + 0.025 v 1 1 overdischarge detection voltage v dl 2.00 to 3.00 v, adjustable v dl ? 0.05 v dl v dl + 0.05 v 2 2 v du v dl v du ? 0.10 v du v du + 0.10 v 2 2 overdischarge release voltage v du 2.00 to 3.40 v, adjustable v du = v dl v du ? 0.05 v du v du + 0.05 v 2 2 discharge overcurrent detection voltage v diov 0.05 to 0.30 v, adjustable v diov ? 0.015 v diov v diov + 0.015 v 3 2 load short-circuiting detection voltage *2 v short ? 0.30 0.50 0.70 v 3 2 charger detection voltage v cha ? ? 1.0 ? 0.7 ? 0.4 v 4 2 0 v battery charge function 0 v battery charge starting charger voltage v 0cha 0 v battery charging function ?available? 1.2 ? ? v 10 2 0 v battery charge inhibition battery voltage v 0inh 0 v battery charging function ?unavailable? ? ? 0.5 v 11 2 internal resistance resistance between vm pin and vdd pin r vmd v dd = 1.8 v, v vm = 0 v 100 300 900 k ? 5 3 resistance between vm pin and vss pin r vms v dd = 3.5 v, v vm = 1.0 v 10 20 40 k ? 5 3 [input voltage] operating voltage between vdd pin and vss pin v dsop1 ? 1.5 ? 8 v ? ? operating voltage between vdd pin and vm pin v dsop2 ? 1.5 ? 28 v ? ? input current (shutdown function yes) current consumption during operation i ope v dd = 3.5 v, v vm = 0 v 1.0 3.0 5.5 a 4 2 current consumption at power-down i pdn v dd = v vm = 1.5 v ? ? 0.2 a 4 2 input current (shutdown function no) current consumption during operation i ope v dd = 3.5 v, v vm = 0 v 1.0 3.0 5.5 a 4 2 current consumption during overdischarge i oped v dd = v vm = 1.5 v 0.3 2.0 3.5 a 4 2 output resistance co pin resistance ?h? r coh v co = 3.0 v, v dd = 3.5 v, v vm = 0 v 2.5 5 10 k ? 6 4 co pin resistance ?l? r col v co = 0.5 v, v dd = 4.5 v, v vm = 0 v 2.5 5 10 k ? 6 4 do pin resistance ?h? r doh v do = 3.0 v, v dd = 3.5 v, v vm = 0 v 2.5 5 10 k ? 7 4 do pin resistance ?l? r dol v do = 0.5 v, v dd =v vm = 1.8 v 2.5 5 10 k ? 7 4 *1. since products are not screened at high a nd low temperature, the s pecification for this tem perature range is guaranteed by design, not tested in production. *2. in any conditions, load short-circuiting detection voltage (v short ) is higher discharge overcurrent detection voltage (v diov ).
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 9 2. except detection delay time ( ? 40 to + 85c *1 ) table 9 ( ? 40 to + 85c *1 unless otherwise specified) item symbol condition min. typ. max. unit test condi- tion test circuit detection voltage overcharge detection voltage v cu 3.90 to 4.40 v, adjustable v cu ? 0.060 v cu v cu + 0.040 v 1 1 v cl v cu v cl ? 0.08 v cl v cl + 0.065 v 1 1 overcharge release voltage v cl 3.80 to 4.40 v, adjustable v cl = v cu v cl ? 0.08 v cl v cl + 0.04 v 1 1 overdischarge detection voltage v dl 2.00 to 3.00 v, adjustable v dl ? 0.11 v dl v dl + 0.13 v 2 2 v du v dl v du ? 0.15 v du v du + 0.19 v 2 2 overdischarge release voltage v du 2.00 to 3.40 v, adjustable v du = v dl v du ? 0.11 v du v du + 0.13 v 2 2 discharge overcurrent detection voltage v diov 0.05 to 0.30 v, adjustable v diov ? 0.021 v diov v diov + 0.024 v 3 2 load short-circuiting detection voltage *2 v short ? 0.16 0.50 0.84 v 3 2 charger detection voltage v cha ? ? 1.2 ? 0.7 ? 0.2 v 4 2 0 v battery charge function 0 v battery charge starting charger voltage v 0cha 0 v battery charging function ?available? 1.7 ? ? v 10 2 0 v battery charge inhibition battery voltage v 0inh 0 v battery charging function ?unavailable? ? ? 0.3 v 11 2 internal resistance resistance between vm pin and vdd pin r vmd v dd = 1.8 v, v vm = 0 v 78 300 1310 k ? 5 3 resistance between vm pin and vss pin r vms v dd = 3.5 v, v vm = 1.0 v 7.2 20 44 k ? 5 3 input voltage operating voltage betw een vdd pin and vss pin v dsop1 ? 1.5 ? 8 v ? ? operating voltage between vdd pin and vm pin v dsop2 ? 1.5 ? 28 v ? ? input current (shutdown function yes) current consumption during operation i ope v dd = 3.5 v, v vm = 0 v 0.7 3.0 6.0 a 4 2 current consumption at power-down i pdn v dd = v vm = 1.5 v ? ? 0.3 a 4 2 input current (shutdown function no) current consumption during operation i ope v dd = 3.5 v, v vm = 0 v 0.7 3.0 6.0 a 4 2 current consumption during overdischarge i oped v dd = v vm = 1.5 v 0.2 2.0 3.8 a 4 2 output resistance co pin resistance ?h? r coh v co = 3.0 v, v dd = 3.5 v, v vm = 0 v 1.2 5 15 k ? 6 4 co pin resistance ?l? r col v co = 0.5 v, v dd = 4.5 v, v vm = 0 v 1.2 5 15 k ? 6 4 do pin resistance ?h? r doh v do = 3.0 v, v dd = 3.5 v, v vm = 0 v 1.2 5 15 k ? 7 4 do pin resistance ?l? r dol v do = 0.5 v, v dd = v vm = 1.8 v 1.2 5 15 k ? 7 4 *1. since products are not screened at high a nd low temperature, the s pecification for this tem perature range is guaranteed by design, not tested in production. *2. in any conditions, load short-circuiting detection voltage (v short ) is higher discharge overcurrent detection voltage (v diov ).
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 10 3. detection delay time (1) S-8211Dab, S-8211Dae, S-8211Dag, S-8211Dah, S-8211Dai, S-8211Daj, S-8211Dak, S-8211Dal, S-8211Dam table 10 item symbol condition min. typ. max. unit test condi- tion test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.96 1.2 1.4 s 8 5 overdischarge detection delay time t dl ? 120 150 180 ms 8 5 discharge overcurrent detection delay time t diov ? 7.2 9 11 ms 9 5 load short-circuiting detection delay time t short ? 240 300 360 s 9 5 delay time (ta = ? 40 to + 85c) *1 overcharge detection delay time t cu ? 0.7 1.2 2.0 s 8 5 overdischarge detection delay time t dl ? 83 150 255 ms 8 5 discharge overcurrent detection delay time t diov ? 5 9 15 ms 9 5 load short-circuiting detection delay time t short ? 150 300 540 s 9 5 *1. since products are not screened at high a nd low temperature, the s pecification for this tem perature range is guaranteed by design, not tested in production. (2) S-8211Daf table 11 item symbol condition min. typ. max. unit test condi- tion test circuit delay time (ta = 25c) overcharge detection delay time t cu ? 0.96 1.2 1.4 s 8 5 overdischarge detection delay time t dl ? 61 75 90 ms 8 5 discharge overcurrent detection delay time t diov ? 7.2 9 11 ms 9 5 load short-circuiting detection delay time t short ? 240 300 360 s 9 5 delay time (ta = ? 40 to + 85c) *1 overcharge detection delay time t cu ? 0.7 1.2 2.0 s 8 5 overdischarge detection delay time t dl ? 41 75 128 ms 8 5 discharge overcurrent detection delay time t diov ? 5 9 15 ms 9 5 load short-circuiting detection delay time t short ? 150 300 540 s 9 5 *1. since products are not screened at high a nd low temperature, the s pecification for this tem perature range is guaranteed by design, not tested in production.
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 11 ? test circuits caution unless otherwise specified, the output voltage levels ?h? and ?l? at co pin (v co ) and do pin (v do ) are judged by the threshold voltage (1.0 v) of the n-channel fet. judge the co pin level with respect to v vm and the do pin level with respect to v ss . (1) overcharge detection voltage, overcharge release voltage (test condition 1, test circuit 1) overcharge detection voltage (v cu ) is defined as the voltage between the vdd pin and vss pin at which v co goes from ?h? to ?l? when the voltage v1 is gradually increased from the starting condition of v1 = 3.5 v. overcharge release voltage (v cl ) is defined as the volt age between the vdd pin and vss pin at which v co goes from ?l? to ?h? when the voltage v1 is then gradually decr eased. overcharge hysteresis voltage (v hc ) is defined as the difference between overcharge detection voltage (v cu ) and overcharge release voltage (v cl ). (2) overdischarge detection voltage, overdischarge release voltage (test condition 2, test circuit 2) overdischarge detection voltage (v dl ) is defined as the voltage between the vdd pin and vss pin at which v do goes from ?h? to ?l? when the voltage v1 is gradually decreased fr om the starting condition of v1 = 3.5 v, v2 = 0 v. overdischarge release voltage (v du ) is defined as the volt age between the vdd pin and vss pin at which v do goes from ?l? to ?h? when the voltage v1 is then gradual ly increased. overdischarge hysteresis voltage (v hd ) is defined as the difference between overdischarge release voltage (v du ) and overdischarge detection voltage (v dl ). (3) discharge overcurrent detection voltage (test condition 3, test circuit 2) discharge overcurrent detection voltage (v diov ) is defined as the voltage bet ween the vm pin and vss pin whose delay time for changing v do from ?h? to ?l? lies between the minimum and the maximum value of discharge overcurrent delay time when the voltag e v2 is increased rapidly (within 10 s) from the starting c ondition of v1 = 3.5 v, v2 = 0 v. (4) load short-circuiting detection voltage (test condition 3, test circuit 2) load short-circuiting detection voltage (v short ) is defined as the voltage between the vm pin and vss pin whose delay time for changing v do from ?h? to ?l? lies between the minimum and the maximum value of load short-circuiting delay time when the voltage v2 is increased rapidly (within 10 s) from the starting condition of v1 = 3.5 v, v2 = 0 v. (5) operating current consumption (test condition 4, test circuit 2) the operating current consumption (i ope ) is the current that flows through the vdd pin (i dd ) under the set conditions of v1 = 3.5 v and v2 = 0 v (normal status). (6) charger detection voltage (= the det ection voltage for irregular charging current) (test condition 4, test circuit 2) the charger detection voltage (v cha ) is the voltage between the vm and vss pin; when graduall y increasing v1 at v1 = 1.8 v, v2 = 0 v to set v1 = v dl +(v hd /2), after that, decreasing v2 gradually from 0 v so that v do goes ?l? to ?h?. measurement of the charger detection voltage is available for the product with overdischarge hysteresis v hd 0 only. the detection voltage for irregular charging current is the voltage between the vm and vss pin; when gradually decreasing v2 at v1 = 3.5 v, v2 = 0 v and v co goes ?h? to ?l?. the value of the detection voltage for irregular charging current is equal to the charger detection voltage (v cha ).
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 12 (7) power-down current consumption, overdischarge current consumption (test condition 4, test circuit 2) shutdown function yes product the power-down current consumption (i pdn ) is the current that flows through the vdd pin (i dd ) under the set conditions of v1 = v2 = 1. 5 v (overdischarge status). shutdown function no product the overdischarge current consumption (i oped ) is the current that fl ows through the vdd pin (i dd ) under the set conditions of v1 = v2 = 1. 5 v (overdischarge status). (8) resistance between vm pin and vdd pin (test condition 5, test circuit 3) the resistance between vm pin and vdd pin (r vmd ) is the resistance between vm pin and vdd pin under the set conditions of v1 = 1.8 v, v2 = 0 v. (9) resistance between vm pin and vss pin (test condition 5, test circuit 3) the resistance between vm pin and vss pin (r vms ) is the resistance between vm pin and vss pin under the set conditions of v1 = 3.5 v, v2 = 1.0 v. (10) co pin resistance ?h? (test condition 6, test circuit 4) the co pin resistance ?h? (r coh ) is the resistance at the co pin under the set conditions of v1 = 3.5 v, v2 = 0 v, v3 = 3.0 v. (11) co pin resistance ?l? (test condition 6, test circuit 4) the co pin resistance ?l? (r col ) is the resistance at the co pin under the set conditions of v1 = 4.5 v, v2 = 0 v, v3 = 0.5 v. (12) do pin resistance ?h? (test condition 7, test circuit 4) the do pin h resistance (r doh ) is the resistance at the do pin under th e set conditions of v1 = 3.5 v, v2 = 0 v, v4 = 3.0 v. (13) do pin resistance ?l? (test condition 7, test circuit 4) the do pin l resistance (r dol ) is the resistance at the do pin under the set conditions of v1 = 1.8 v, v2 = 0 v, v4 = 0.5 v. (14) overcharge detection delay time (test condition 8, test circuit 5) the overcharge detection delay time (t cu ) is the time needed for v co to change from ?h? to ?l? just after the voltage v1 momentarily increases (within 10 s) from overcharge detection voltage (v cu ) ? 0.2 v to overcharge detection voltage (v cu ) + 0.2 v under the set conditions of v2 = 0 v. (15) overdischarge detection delay time (test condition 8, test circuit 5) the overdischarge detection delay time (t dl ) is the time needed for v do to change from ?h? to ?l? just after the voltage v1 momentarily decreases (within 10 s) from overcharge detection voltage (v dl ) + 0.2 v to overcharge detection voltage (v dl ) ? 0.2 v under the set condition of v2 = 0 v.
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 13 (16) discharge overcurrent detection delay time (test condition 9, test circuit 5) discharge overcurrent detection delay time (t diov ) is the time needed for v do to go to ?l? after the voltage v2 momentarily increases (within 10 s) from 0 v to 0.35 v under the set conditions of v1 = 3.5 v, v2 = 0 v. (17) load short-circuiting detection delay time (test condition 9, test circuit 5) load short-circuiting detection delay time (t short ) is the time needed for v do to go to ?l? after the voltage v2 momentarily increases (within 10 s) from 0 v to 1.6 v under the set conditions of v1 = 3.5 v, v2 = 0 v. (18) 0 v battery charge starting charger voltage (products with 0 v battery charging function is ?available?) (test condition 10, test circuit 2) the 0 v charge starting charger voltage (v 0cha ) is defined as the voltage between the vdd pin and vm pin at which v co goes to ?h? (v vm + 0.1 v or higher) when the voltage v2 is graduall y decreased from the star ting condition of v1 = v2 = 0 v. (19) 0 v battery charge inhibition battery voltage (products with 0 v battery charging function is ?unavailable?) (test condition 11, test circuit 2) the 0 v charge inhibition charger voltage (v 0inh ) is defined as the voltage between the vdd pin and vss pin at which v co goes to ?h? (v vm + 0.1 v or higher) when the voltage v1 is gradually increased from the starting condition of v1 = 0 v, v2 = ? 4 v.
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 14 v v do v v co co do vss vdd vm S-8211D series r1 = 220 ? v1 com v v do v v co co do vss vdd vm S-8211D series v1 v2 com a i dd figure 5 test circuit 1 figure 6 test circuit 2 co do vss vdd vm S-8211D series v1 v2 com a i dd a i vm a i do a i co co do vss vdd vm S-8211D series v1 v2 com v4 v3 figure 7 test circuit 3 figure 8 test circuit 4 co do vss vdd vm S-8211D series v1 v2 com oscilloscope oscilloscope figure 9 test circuit 5
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 15 ? operation remark refer to the ? battery protection ic connection example ?. 1. normal status this ic monitors the voltage of the battery connect ed between the vdd pin and vss pin and the voltage difference between the vm pin and vss pin to control charging and disc harging. when the battery voltage is in the range from overdischarge detection voltage (v dl ) to overcharge detection voltage (v cu ), and the vm pin voltage is not more than the discharge overcurrent detection voltage (v diov ), the ic turns both the charging and discharging control fets on. this condition is called the normal status, and in this c ondition charging and discharging can be carried out freely. the resistance (r vmd ) between the vm pin and vdd pin, and the resistance (r vms ) between the vm pin and vss pin are not connected in the normal status. caution when the battery is connected for the first time, discharging may not be enabled. in this case, short the vm pin and vss pin or connect the charger to restore the normal status. 2. overcharge status when the battery voltage becomes higher than overcharge detection voltage (v cu ) during charging in the normal status and detection continues for the overcharge detection delay time (t cu ) or longer, the S-8211D series turns the charging control fet off to stop charging. this condition is called the overcharge status. the resistance (r vmd ) between the vm pin and vdd pin, and the resistance (r vms ) between the vm pin and vss pin are not connected in t he overcharge status. the overcharge status is released in the following two cases ( (1) and (2) ). (1) in the case that the vm pin voltage is hig her than or equal to charger detection voltage (v cha ), and is lower than the discharge overcurrent detection voltage (v diov ), S-8211D series releases t he overcharge status when the battery voltage falls below the overcharge release voltage (v cl ). (2) in the case that the vm pin voltage is higher than or equal to the discharge overcurrent detection voltage (v diov ), S-8211D series releases the overcharge status when t he battery voltage falls below the overcharge detection voltage (v cu ). when the discharge is started by connecting a load after the overcharge detection, the vm pin voltage rises more than the voltage at vss pin due to the v f voltage of the parasitic diode. this is because the discharge current flows through the parasitic diode in the charging control fet. if this vm pin voltage is higher than or equal to the discharge overcurrent detection voltage (v diov ), S-8211D series releases the ov ercharge status when the battery voltage is lower than or equal to the overcharge detection voltage (v cu ). cautions 1. if the battery is charged to a voltage higher than overcharge detection voltage (v cu ) and the battery voltage does not fall below overcharge detection voltage (v cu ) even when a heavy load is connected, discharge overcurrent detection and load short-circuiting detection do not function until the battery voltage falls below overcharge detection voltage (v cu ). since an actual battery has an internal impedance of tens of m ? , the battery voltage drops immediately after a heavy load that causes overcurrent is connected, and discharge overcurrent detection and load short- circuiting detection function. 2. when a charger is connected after overcharge detection, the overcharge status is not released even if the battery voltage is below overcharge release voltage (v cl ). the overcharge status is released when the vm pin voltage goes over charger detection voltage (v cha ) by removing the charger.
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 16 3. overdischarge status with shutdown function when the battery voltage falls below overdischarge detection voltage (v dl ) during discharging in the normal status and the detection continues for the overdischarge detection delay time (t dl ) or longer, the S-8211D series turns the discharging control fet off to stop discharging. this c ondition is called the overdischarge status. under the overdischarge status, the vm pin voltag e is pulled up by the resistor between the vm pin and vdd pin in the ic (r vmd ). when voltage difference between the vm pin and vdd pin then is 1.3 v (typ.) or lower, the current consumption is reduced to the power-down current consumption (i pdn ). this condition is called the power-down status. the resistance (r vms ) between the vm pin and vss pin is not connected in the power-down status and the overdischarge status. the power-down status is released when a charger is connected and the voltage difference between the vm pin and vdd pin becomes 1.3 v (typ.) or higher. when a battery in the overdischarge status is connected to a charger and provided that the vm pin voltage is lower than charger detection voltage (v cha ), the S-8211D series releases t he overdischarge status and turns the discharging fet on when the battery voltage reaches overdischarge detection voltage (v dl ) or higher. when a battery in the overdischarge status is connected to a charger and provided that the vm pin voltage is not lower than charger detection voltage (v cha ), the S-8211D series releases the overdischarge status when the battery voltage reaches overdischarge release voltage (v du ) or higher. without shutdown function when the battery voltage falls below overdischarge detection voltage (v dl ) during discharging in the normal status and the detection continues for the overdischarge detection delay time (t dl ) or longer, the S-8211D series turns the discharging control fet off to stop discharging. this c ondition is called the overdischarge status. under the overdischarge status, the vm pin voltag e is pulled up by the resistor between the vm pin and vdd pin in the ic (r vmd ). the resistance (r vms ) between the vm pin and vss pin is not connected in the ov erdischarge status. when a battery in the overdischarge status is connected to a charger and provided that the vm pin voltage is lower than charger detection voltage (v cha ), the S-8211D series releases t he overdischarge status and turns the discharging fet on when the battery voltage reaches overdischarge detection voltage (v dl ) or higher. when a battery in the overdischarge status is connected to a charger and provided that the vm pin voltage is not lower than charger detection voltage (v cha ), the S-8211D series releases the overdischarge status when the battery voltage reaches overdischarge release voltage (v du ) or higher. 4. discharge overcurrent status (discharge overcurrent, load short-circuiting) when a battery in the normal status is in the status where the volt age of the vm pin is equal to or higher than the discharge overcurrent detection voltage because the discharge current is higher than the specified value and the status lasts for the discharge over current detection delay time, the discharge control fet is turned off and discharging is stopped. this status is called the discharge overcurrent status. in the discharge overcurrent status, the vm pin and vss pin are shorted by the resistor between vm pin and vss pin (r vms ) in the ic. however, the volt age of the vm pin is at the v dd potential due to the load as long as the load is connected. when the load is disconnec ted, the vm pin returns to the v ss potential. this ic detects the status w hen the impedance between the eb + pin and eb ? pin (refer to the figure 13 ) increases and is equal to the impedance that enables automatic restoration and the voltage at the vm pin returns to discharge overcurrent detection voltage (v diov ) or lower, the discharge overcurrent st atus is restored to the normal status. even if the connected impedance is smal ler than automatic restoration level, t he S-8211D series will be restored to the normal status from discharge overcu rrent detection status when the voltage at the vm pin becomes the discharge overcurrent detection voltage (v diov ) or lower by connecting the charger. the resistance (r vmd ) between the vm pin and vdd pin is not connec ted in the discharge overcurrent detection status.
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 17 5. detection for irregular charging current during charging a battery which is in the normal status , if the vm pin voltage becomes lower than the charger detection voltage (v cha ) and this status is held longer than the overcharge detection delay time (t cu ), S-8211D turns off the charge-control fet to stop charging. th is is detection for irregular charging current. this function works in the case that the do pin voltage is in ?h?, and the vm pin voltage becomes lower than the charger detection voltage (v cha ). thus if the irregular charger current flow s in the battery in the overdischarge status, S-8211D turns off the charge-control fet to stop charging; t he do pin voltage goes in ?h? so that the battery voltage becomes higher than the overdischarge detection volta ge, and after the overcharge detection delay time (t cu ). the status irregular charging current de tection is released by the lower potential difference between the vm and vss pin than the charger detection voltage (v cha ). 6. 0 v battery charging function ?available? this function is used to recharge a connected battery wh ose voltage is 0 v due to self-discharge. when the 0 v battery charge starting charger voltage (v 0cha ) or a higher voltage is applied between the eb + and eb ? pins by connecting a charger, the charging control fe t gate is fixed to the vdd pin voltage. when the voltage between the gate and source of the charging control fet becomes equal to or higher than the turn- on voltage due to the charger voltage, the charging control fet is turned on to start charging. at this time, the discharging control fet is off and the charging current flows through the internal parasitic diode in the discharging control fet. when the battery voltage becomes equal to or higher than overdischarge release voltage (v du ), the s- 8211d series enters the normal status. caution some battery providers do not recommend charging for a completely self-discharged battery. please ask the battery provider to determine whether to enable or inhibit the 0 v battery charging function. 7. 0 v battery charging function ?unavailable? this function inhibits recharging when a battery that is inte rnally short-circuited (0 v battery) is connected. when the battery voltage is the 0 v battery charge inhibition battery voltage (v 0inh ) or lower, the charging control fet gate is fixed to the eb ? pin voltage to inhibit charging. when the battery voltage is the 0 v battery charge inhibition battery voltage (v 0inh ) or higher, charging can be performed. caution some battery providers do not recommend charging for a completely self-discharged battery. please ask the battery provider to determine whether to enable or inhibit the 0 v battery charging function.
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 18 9. delay circuit the detection delay times are determined by dividing a clock of approximately 3.5 khz by the counter. remark1. the discharge overcurrent detection delay time (t diov ) and the load short-circuiting detection delay time (t short ) start when the discharge ov ercurrent detection voltage (v diov ) is detected. when the load short- circuiting detection voltage (v short ) is detected over the load short- circuiting detection delay time (t short ) after the detection of discharge overcurrent detection voltage (v diov ), the S-8211D turns the discharging control fet off within t short from the time of detecting v short . do pin vm pin v dd v dd time v diov v ss v ss v short load short-circuiting det ection delay time (t short ) time t d 0 t d t short figure 10 2. with shutdown function when any overcurrent is detected and the overcurrent continues fo r longer than the overdischarge detection delay time (t dl ) without the load being released, the stat us changes to the power-down status at the point where the battery voltage fa lls below overdischarge detection voltage (v dl ). when the battery voltage falls below overdischarge detection voltage (v dl ) due to overcurrent, the s- 8211d series turns the discharging control fet off via ov ercurrent detection. in th is case, if the recovery of the battery voltage is so slow that the battery voltage after the ov erdischarge detection delay time is still lower than the overdischarge detec tion voltage, S-8211D series shifts to the power-down status. without shutdown function when any overcurrent is detected and the overcurrent continues fo r longer than the overdischarge detection delay time (t dl ) without the load being released, the stat us changes to the overdischarge status at the point where the battery voltage fa lls below overdischarge detection voltage (v dl ). when the battery voltage falls below overdischarge detection voltage (v dl ) due to overcurrent, the s- 8211d series turns the discharging control fet off via ov ercurrent detection. in th is case, if the recovery of the battery voltage is so slow that the battery voltage after the ov erdischarge detection delay time is still lower than the overdischarge detec tion voltage, S-8211D series shifts to the overdischarge status.
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 19 ? timing chart (1) overcharge detection, overdischarge detection v cu v du (v dl + v hd ) v dl v cl (v cu ? v hc ) battery voltage v ss co pin voltage v dd do pin voltage v ss charger connection load connection mode *1 overcharge detecti on delay time ( t cu ) overdischarge detecti on delay time ( t dl ) (1) (2) (1) (3) (1) v diov v ss vm pin voltage v dd v eb ? v dd v eb ? *1. (1) : normal mode (2) : overcharge mode (3) : overdischarge mode remark the charger is assumed to charge with a constant current. figure 11
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 20 (2) discharge overcurrent detection v dd v ss v short (1) (2) (1) (1) load short-circuiting detection delay time (t short ) (2) v diov discharge overcurrent detection delay time (t diov ) v cu v du (v dl + v hd ) v dl v cl (v cu ? v hc ) battery voltage v ss co pin voltage v dd do pin voltage v ss load connection mode *1 vm pin voltage v dd *1. (1) : normal mode (2) : discharge overcurrent mode remark the charger is assumed to charge with a constant current. figure 12
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 21 (3) charger detection v dd do pin voltage v ss v dd v ss co pin voltage v dd v ss vm pin voltage v cha v cu v du (v dl + v hd ) v dl v cl (v cu ? v hc ) battery voltage mode *1 load connection overdischarge detection delay time (t dl ) (1) in case vm pin voltage < v cha overdischarge is released at the overdischarge detection voltage (v dl ) charger connection (2) (1) *1. (1) : normal mode (2) : overdischarge mode remark the charger is assumed to charge with a constant current. figure 13
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 22 (4) detection for irregular charging current v dd do pin voltage v ss v dd v ss co pin voltage v dd v ss vm pin voltage v cha v cu v du (v dl + v hd ) v dl v cl (v cu ? v hc ) battery voltage charger connection abnormal charging current detection delay time ( = overcharge detection delay time (t cu )) mode *1 load connection overdischarge detection delay time (t dl ) (1) (2) (3) (1) (1) *1. (1) : normal mode (2) : overdischarge mode (3) : overcharge mode remark the charger is assumed to charge with a constant current. figure 14
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 23 ? battery protection ic connection example r1 battery c1 vss do vdd co vm S-8211D series fet1 fet2 eb ? eb + r2 figure 15 table 12 constants for external components symbol part purpose typ. min. max. remark fet1 n-channel mos fet discharge control ? ? ? threshold voltage overdischarge detection voltage *1 gate to source withstanding voltage charger voltage *2 fet2 n-channel mos fet charge control ? ? ? threshold voltage overdischarge detection voltage *1 gate to source withstanding voltage charger voltage *2 r1 resistor esd protection, for power fluctuation 220 ? 100 ? 330 ? resistance should be as small as possible to avoid lowering the overcharge detection accuracy due to current consumption. *3 c1 capacitor for power fluctuation 0.1 f 0.022 f 1.0 f connect a capacitor of 0.022 f or higher between vdd pin and vss pin. *4 r2 resistor protection for reverse connection of a charger 2 k ? 300 ? 4 k ? select as large a resistance as possible to prevent current when a charger is connected in reverse. *5 *1. if the threshold voltage of an fet is low, the fet may not cut the charging current. if an fet with a threshold voltage equal to or higher than the overdischarge detection voltage is used, dischargi ng may be stopped before overdischarge is detected. *2. if the withstanding voltage between the gate and source is lo wer than the charger voltage, the fet may be destroyed. *3. if r1 has a high resistance, the volt age between vdd pin and vss pin may exceed the absolute maximum rating when a charger is connected in reverse since the current flows from the charger to the ic. insert a resistor of 100 ? or higher as r1 for esd protection. *4. if a capacitor of less than 0.022 f is connected to c1, do pin may oscillate wh en load short-circuiting is detected. be sure to connect a capacitor of 0.022 f or higher to c1. *5. if r2 has a resistance higher than 4 k ? , the charging current may not be cut when a high-voltage charger is connected. caution 1. the above constants may be changed without notice. 2. it has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. in additi on, the example of connection show n above and the constant do not guarantee proper operation. perform through evaluation using the actual application to set the constant.
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 24 ? precautions ? the application conditions for the i nput voltage, output voltage, and load curre nt should not exceed the package power dissipation. ? do not apply an electrostatic discharge to this ic that ex ceeds the performance ratings of the built-in electrostatic protection circuit. ? sii claims no responsibility for any and all disputes arisi ng out of or in connection with any infringement by products including this ic of patents owned by a third party.
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 25 ? characteristics (typical data) 1. current consumption (1) i ope vs. ta (2) i pdn vs. ta ? 40 ? 25 0 25 50 75 85 6 5 4 3 2 1 0 ta [ c] i ope [ a] ? 40 ? 25 0 25 50 7585 ta [ c] 0.16 0.14 0.12 0.10 0.08 0.06 0 i pdn [ a] 0.04 0.02 (3) i ope vs. v dd 0 2 4 6 v dd [v] 6 5 4 3 2 1 0 i ope [ a] 8 2. overcharge detection / release voltage, overdi scharge detection / release voltage, overcurrent detection voltage, and delay time (1) v cu vs. ta (2) v cl vs. ta ? 40 ? 25 0 25 50 75 85 ta [ c] 4.350 4.345 4.340 4.335 4.330 4.325 4.300 v cu [v] 4.320 4.315 4.310 4.305 ? 40 ? 25 0 25 50 75 85 ta [ c] 4.125 4.115 4.105 4.095 4.085 4.075 4.025 v cl [v] 4.065 4.055 4.045 4.035 (3) v du vs. ta (4) v dl vs. ta ? 40 ? 25 0 25 50 75 85 ta [ c] 2.95 2.94 2.93 2.92 2.91 2.90 2.85 v du [v] 2.89 2.88 2.87 2.86 ? 40 ? 25 0 25 50 75 85 ta [ c] 2.60 2.58 2.56 2.54 2.52 2.50 2.40 v dl [v] 2.48 2.46 2.44 2.42
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 26 (5) t cu vs. ta (6) t cl vs. ta ? 40 ? 25 0 25 50 7585 ta [ c] 1.50 1.45 1.40 1.35 1.30 1.25 1.00 t cu [s] 1.20 1.15 1.10 1.05 ? 40 ? 25 0 25 50 7585 ta [ c] 50 48 46 44 42 40 30 t cl [s] 38 36 34 32 (7) t du vs. ta (8) t dl vs. ta ? 40 ? 25 0 25 50 7585 ta [ c] 2.85 2.75 2.65 2.55 2.45 2.35 1.85 t du [ms] 2.25 2.15 2.05 1.95 ? 40 ? 25 0 25 50 7585 ta [ c] 200 190 180 170 160 150 100 t dl [ms] 140 130 120 110 (9) v diov vs. ta (10) t diov vs. v dd ? 40 ? 25 0 25 50 75 85 ta [ c] 0.175 0.170 0.165 0.160 0.155 0.150 0.125 v diov [v] 0.145 0.140 0.135 0.130 3.0 3.5 4.0 4.5 v dd [v] 14 13 12 11 10 9 4 t diov [ms] 8 7 6 5 (11) t diov vs. ta ? 40 ? 25 0 25 50 75 85 ta [ c] 14 13 12 11 10 9 4 t diov [ms] 8 7 6 5
battery protection ic for 1-cell pack rev.4.5 _00 S-8211D series seiko instruments inc. 27 (12) v short vs. ta (13) t short vs. v dd 0.75 0.70 0.65 0.60 0.55 0.50 0.25 v short [v] 0.45 0.40 0.35 0.30 ? 40 ? 25 0 25 50 7585 ta [ c] 3.0 3.5 4.0 4.5 v dd [v] 0.65 0.63 0.61 0.59 0.57 0.55 0.45 t short [ms] 0.53 0.51 0.49 0.47 (14) t short vs. ta ? 40 ? 25 0 25 50 7585 ta [ c] 1.0 0.9 0.8 0.7 0.6 0.5 0 t short [ms] 0.4 0.3 0.2 0.1 3. co pin / do pin (1) i coh vs. v co (2) i col vs. v co 0 ? 0.1 ? 0.2 ? 0.5 i coh [ma] ? 0.3 ? 0.4 0 1 2 3 4 v co [v] 0.5 0.4 0.3 0 i col [ma] 0.2 0.1 0 1 2 3 4 v co [v] (3) i doh vs. v do (4) i dol vs. v do 0 1 2 3 4 v do [v] 0 ? 0.05 ? 0.10 ? 0.15 ? 0.30 i doh [ma] ? 0.20 ? 0.25 0 0.5 1.0 1.5 v do [v] 0.20 0.15 0.10 0 i dol [ma] 0.05
battery protection ic for 1-cell pack S-8211D series rev.4.5 _00 seiko instruments inc. 28 ? marking specifications (1) sot-23-5 (1) to (3): product code (refer to product name vs. product code ) (4) : lot number 1 sot-23-5 to p view 2 3 4 (1) (2) (3) (4) 5 product name vs. product code product code product name (1) (2) (3) S-8211Dab-m5t1g r 2 b S-8211Dae-m5t1g r 2 e S-8211Dah-m5t1g r 2 h S-8211Dai-m5t1g r 2 i S-8211Daj-m5t1g r 2 j S-8211Dak-m5t1g r 2 k S-8211Dal-m5t1g r 2 l S-8211Dam-m5t1g r 2 m remark please contact our sales office for the products other than t hose specified above. (2) snt-6a (1) to (3): product code (refer to product name vs. product code ) (4) to (6): lot number snt-6a to p view 1 2 3 4 6 5 (1) (4) (2) (5) (3) (6) product name vs. product code product code product name (1) (2) (3) S-8211Dab-i6t1g r 2 b S-8211Dae-i6t1g r 2 e S-8211Daf-i6t1g r 2 f S-8211Dag-i6t1g r 2 g remark please contact our sales office for the products other than t hose specified above.

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the information described herein is subject to change without notice. seiko instruments inc. is not responsible for any problems caused by circuits or diagrams described herein whose related industrial properties, patents, or other rights belong to third parties. the application circuit examples explain typical applications of the products, and do not guarantee the success of any specific mass-production design. when the products described herein are regulated products subject to the wassenaar arrangement or other agreements, they may not be exported without authorization from the appropriate governmental authority. use of the information described herein for other purposes and/or reproduction or copying without the express permission of seiko instruments inc. is strictly prohibited. the products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of seiko instruments inc. although seiko instruments inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may occur. the user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.

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